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CL VFDs Application Note APN130

2. POWER SUPPLY

Power requirement of CL VFD is filament supply, which is same as ordinary VFDs, logic supply voltage of "VDD1" and display supply voltage of "VDD2". The table below indicates the power supplies that are usually required to drive the CL VFDs.

Table 1. Types of Power Supplies

Symbol Terminal Item Function Notes

Ef F1-F2 Filament Voltage Refer to the specification AC

VDD1 VDD1 Logic Supply Voltage For logic in silicon chip 5V

VDD2 VDD2 Display Supply Voltage High voltage supply for drivers in silicon chip 15V

EC G Grid Voltage To grid

EK - Filament Bias Voltage
0.6V

- GND Ground Ground of VDD1 and VDD2 Ground 0V

Note: The functions vary by each item. Please check the specification for details.

Fig.5 AC Filament Drive

2.1 Filament Voltage "Ef"

The CL VFD needs a filament voltage because it is also a kind of triode vacuum tube with a direct heated cathode such as an ordinary VFDs. (For details on the structure of ordinary VFDs, please refer to the Vacuum Fluorescent Display Application Note APN102.)
In an actual VFD, the voltage is applied across terminals "F1" and "F2". For the filament to properly function, the appropriate power must be fed to heat the filament to a proper temperature. The supply voltage varies from one type of VFD to another, and its optimum value is specified and expressed with the symbol "Ef" in the corresponding specification.
This filament voltage has an important role for the VFD to function properly. If the voltage deviates from the optimum value, the service life of the VFD is likely to be seriously affected. Therefore, customer must design the power supply by observing the rated voltage (typical value) indicated in the specifications.

2.1.1 AC Drive

The AC filament drive is most popular way. Connection diagram is shown in Figure 5.

2.1.2 AC Pulse Drive

Fig.6 AC Pulse Filament Drive

The filament can be also operated with an "AC pulse" by push-pull transistor to transistor switching the DC voltage as in Figure 6. In this case, the voltage supplied to filament will be "AC". This filament drive method makes the filament bias voltage "Ek" for a half of the supply voltage automatically. If you would like this "AC pulse filament drive", please consult us for details.

Refer to APN201 for detais about filament drive.

2.2 Logic Supply Voltage "VDD1"

Fig. 8 Logic supply voltage VDD1 and Noise Filtering Capacitor

The logic supply voltage is one that is supplied to the logic circuit of the built-in drivers. Normally, +5V voltage is applied across terminals "VDD1" and "GND". Always insert a noise filtering ceramic capacitor (0.01 to 0.22 uF) between VDD1 and GND terminals order to avoid false operations due to noise or other reasons. Some types of VFD come with two pairs of "VDD1 " and "GND", as shown in Figure 8. In such case, apply the power to all pairs terminals, and it is advisable to insert the filtering capacitor separately across each-one of the " VDD1" and "GND" pairs.

2.3 Display Supply Voltage

Fig. 9 Display Supply Voltage and Grid Voltage

This power is supplied to the driver circuit of the silicon chip. Its voltage is applied to the phosphor anodes through the driver's output.
Normally, 12 to 15 DC voltage is applied across terminals " VDD2" and "GND". The voltage which is defined in each individual specification should be applied. The rated value of this display supply voltage has been decided assuming the most standard service conditions by the customers. This voltage may be varied within the specified rated voltage range, as required for the intended application, in order to adjust (see note below) the basic brightness of the VFD. Especially when low power consumption is required, the display supply voltage can be held low with a resulting reduction of brightness. The user is requested to contact our office for such specific requirements.
In order to avoid false operation, please insert current limiter RD as shown in Figure 9. The resistance value of RD is about 10 to 100 ohms in most CL VFDs. Please check the exact recommended value in each specification sheet.

Note: The adjustment of brightness as mentioned herein refers to that involved in the setting of the supply voltage. However, if you plan to control the brightness by software as a product function, it is suggested that you adjust it by the blanking control described later, and not by controlling the display supply voltage. For relationships between brightness and drive voltage, refer to the VFD Application Note APN201.

2.4 Grid Voltage "Ec"

The grid voltage is applied to terminal "G". The rate of "Ec" on the specification of CL VFDs represents the voltage between terminal "G" and "GND", and includes the filament bias voltage "Ek". Normally, the same voltage "VDD2" shall be applied to the terminal "G" directly (See figure 9).
Please refer to the "Block Diagram" on the specification which shows how to connect the supply voltages for the "Ec" and other powers.

2.5 Filament Bias Voltage "Ek"

This "Ek" is needed to avoid ghost illumination completely due to the swing of AC filament voltage waves. The "Ek" biases the potential of center level of filament voltage (Filament center-tap=F.C.T.) and ground ("GND")level. In most of CL VFDs require from 0 to 1.0 volts for "Ek". If you set Ek=0V, the display may see a few unintended lit dots illuminated at right and left end of the display area in only dark environment.
If your application allows the ghost illumination, you may omit this "Ek" (then Ek=0V) from your circuit.
To create "Ek", just insert a diode by using the forward-voltage-drop in between F.C.T. and "GND" level (See figure 6,8 and 9).

2.6 Power Supply Sequence

There are 2 types of power supply sequences due to the different internal construction of silicon chips employed in the CL VFD. Special care should be taken with the power supply sequences when the power is switched on or off. Please keep the following sequences in switching the power on and off.

TYPE 1 (Dot pitch=0.347mm Type)

Power On "VDD1" and "VDD2" should be ON at the same time, or "VDD1" should be ON after "VDD2" is ON.
The VDD2"-VDD1" delay time should be small as possible (Less than 200msec.).

Power Off "VDD1" and "VDD2" should be OFF at the same time, or "VDD2" should be OFF after "VDD1" is OFF.
The VDD1"-VDD2" delay time should be small as possible (Less than 200msec.).

TYPE 2 (Dot pitch=0.308mm Type)

Power On "VDD1" and "VDD2" should be ON at the same time, or "VDD2" should be ON after "VDD1" is ON.

Power Off "VDD1" and "VDD2" should be OFF at the same time, or "VDD1" should be OFF after "VDD2" is OFF.

Although there is no specific restriction on the on/off timing between "VDD1"/"VDD2" and filament voltage. Please note that it takes one to two seconds for the filament to raise its temperature to the optimum value after the filament voltage "Ef" is turned on. Before this time period is reached, intended segment may not be displayed.

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APN130